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[X10 Express] Fixes

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- Introduction of -DPCBREV=EXPRESS
- X10 Express external pulses all good
Caution: need to check if no regression on X10 STD
This commit is contained in:
Bertrand Songis
2019-08-14 12:34:44 +02:00
parent fc0e7294a9
commit fad8dd1926
9 changed files with 94 additions and 126 deletions
Download Patch File Download Diff File Expand all files Collapse all files
radio/src/pulses/pulses.cpp
+3 -2
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@@ -61,7 +61,8 @@ uint8_t getRequiredProtocol(uint8_t module)
break;
}
#endif
// no break
protocol = PROTOCOL_CHANNELS_PXX1_PULSES;
break;
case MODULE_TYPE_R9M_PXX1:
protocol = PROTOCOL_CHANNELS_PXX1_PULSES;
@@ -216,7 +217,7 @@ void setupPulsesExternalModule(uint8_t protocol)
break;
#endif
#if defined(PXX1) && defined(EXTMODULE_USART)
#if defined(PXX1) && defined(HARDWARE_EXTERNAL_MODULE_SIZE_SML)
case PROTOCOL_CHANNELS_PXX1_SERIAL:
extmodulePulsesData.pxx_uart.setupFrame(EXTERNAL_MODULE);
scheduleNextMixerCalculation(EXTERNAL_MODULE, EXTMODULE_PXX1_SERIAL_PERIOD);
radio/src/pulses/pulses.h
+1 -1
View File
@@ -281,7 +281,7 @@ union InternalModulePulsesData {
union ExternalModulePulsesData {
#if defined(PXX1)
#if defined(EXTMODULE_USART)
#if defined(HARDWARE_EXTERNAL_MODULE_SIZE_SML)
UartPxx1Pulses pxx_uart;
#endif
#if defined(PPM_PIN_SERIAL)
radio/src/pulses/pulses_common.h
+5 -5
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@@ -23,14 +23,14 @@
#include <inttypes.h>
#if defined(PCBX12S) && PCBREV < 13
#define pulse_duration_t uint32_t
#define trainer_pulse_duration_t uint16_t
#if defined(EXTMODULE_TIMER_32BITS)
typedef uint32_t pulse_duration_t;
#else
#define pulse_duration_t uint16_t
#define trainer_pulse_duration_t uint16_t
typedef uint16_t pulse_duration_t;
#endif
typedef uint16_t trainer_pulse_duration_t;
template <class T, int SIZE>
class DataBuffer {
public:
radio/src/targets/horus/CMakeLists.txt
+4 -1
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@@ -30,6 +30,7 @@ endif()
if (PCB STREQUAL X10)
set(FLAVOUR x10)
set(PCBREV "STD" CACHE STRING "PCB Revision")
add_definitions(-DPCBX10)
add_definitions(-DSOFTWARE_VOLUME)
set(TARGET_SRC
@@ -66,9 +67,11 @@ elseif (PCB STREQUAL X12S)
set(FONTS_TARGET x12s_fonts)
set(LCD_DRIVER lcd_driver.cpp)
set(LUA_EXPORT lua_export_x12s)
add_definitions(-DPCBREV=${PCBREV})
endif()
add_definitions(-DPCBREV=${PCBREV})
add_definitions(-DPCBREV_${PCBREV})
set(FIRMWARE_DEPENDENCIES ${FIRMWARE_DEPENDENCIES} ${BITMAPS_TARGET})
add_definitions(-DPCBHORUS -DSTM32F429_439xx -DSDRAM -DCOLORLCD)
radio/src/targets/horus/backlight_driver.cpp
+17 -20
View File
@@ -33,26 +33,23 @@ void backlightInit()
GPIO_PinAFConfig(BACKLIGHT_GPIO, BACKLIGHT_GPIO_PinSource, BACKLIGHT_GPIO_AF);
// TIMER init
#if defined(PCBX12S)
if (IS_X12S_PROD()) {
BACKLIGHT_TIMER->ARR = 100;
BACKLIGHT_TIMER->PSC = BACKLIGHT_TIMER_FREQ / 10000 - 1; // 1kHz
BACKLIGHT_TIMER->CCMR2 = TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2; // PWM
BACKLIGHT_TIMER->CCER = TIM_CCER_CC4E;
BACKLIGHT_TIMER->CCR4 = 0;
BACKLIGHT_TIMER->EGR = 0;
BACKLIGHT_TIMER->CR1 = TIM_CR1_CEN; // Counter enable
}
else {
BACKLIGHT_TIMER->ARR = 100;
BACKLIGHT_TIMER->PSC = BACKLIGHT_TIMER_FREQ / 10000 - 1; // 1kHz
BACKLIGHT_TIMER->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2; // PWM
BACKLIGHT_TIMER->CCER = TIM_CCER_CC1E | TIM_CCER_CC1NE;
BACKLIGHT_TIMER->CCR1 = 100;
BACKLIGHT_TIMER->EGR = 1;
BACKLIGHT_TIMER->CR1 |= TIM_CR1_CEN; // Counter enable
BACKLIGHT_TIMER->BDTR |= TIM_BDTR_MOE;
}
#if defined(PCBX12S) && PCBREV >= 13
BACKLIGHT_TIMER->ARR = 100;
BACKLIGHT_TIMER->PSC = BACKLIGHT_TIMER_FREQ / 10000 - 1; // 1kHz
BACKLIGHT_TIMER->CCMR2 = TIM_CCMR2_OC4M_1 | TIM_CCMR2_OC4M_2; // PWM
BACKLIGHT_TIMER->CCER = TIM_CCER_CC4E;
BACKLIGHT_TIMER->CCR4 = 0;
BACKLIGHT_TIMER->EGR = 0;
BACKLIGHT_TIMER->CR1 = TIM_CR1_CEN; // Counter enable
#elif defined(PCBX12S)
BACKLIGHT_TIMER->ARR = 100;
BACKLIGHT_TIMER->PSC = BACKLIGHT_TIMER_FREQ / 10000 - 1; // 1kHz
BACKLIGHT_TIMER->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2; // PWM
BACKLIGHT_TIMER->CCER = TIM_CCER_CC1E | TIM_CCER_CC1NE;
BACKLIGHT_TIMER->CCR1 = 100;
BACKLIGHT_TIMER->EGR = 1;
BACKLIGHT_TIMER->CR1 |= TIM_CR1_CEN; // Counter enable
BACKLIGHT_TIMER->BDTR |= TIM_BDTR_MOE;
#elif defined(PCBX10)
BACKLIGHT_TIMER->ARR = 100;
BACKLIGHT_TIMER->PSC = BACKLIGHT_TIMER_FREQ / 1000000 - 1; // 10kHz (same as FrOS)
radio/src/targets/horus/board.h
+15 -15
View File
@@ -76,28 +76,28 @@ void init5msTimer();
// PCBREV driver
enum {
// X12S
PCBREV_X12S_PROD = 0,
PCBREV_X12S_GTE13 = 0,
PCBREV_X12S_LT13 = 1,
// X10
PCBREV_X10 = 0,
PCBREV_X10_STD = 0,
PCBREV_X10_EXPRESS = 3,
};
#if defined(SUMU)
#define IS_FIRMWARE_COMPATIBLE_WITH_BOARD() true
#if defined(SIMU)
#define IS_FIRMWARE_COMPATIBLE_WITH_BOARD() true
#elif defined(PCBX10)
#define IS_FIRMWARE_COMPATIBLE_WITH_BOARD() true
#define IS_X10_EXPRESS() (hardwareOptions.pcbrev == PCBREV_X10_EXPRESS)
#if defined(PCBREV_EXPRESS)
#define IS_FIRMWARE_COMPATIBLE_WITH_BOARD() (hardwareOptions.pcbrev == PCBREV_X10_EXPRESS)
#else
#define IS_FIRMWARE_COMPATIBLE_WITH_BOARD() (hardwareOptions.pcbrev == PCBREV_X10_STD)
#endif
#else
inline bool IS_X12S_PROD()
{
return hardwareOptions.pcbrev == PCBREV_X12S_PROD;
}
#if PCBREV >= 13
#define IS_FIRMWARE_COMPATIBLE_WITH_BOARD() IS_X12S_PROD()
#else
#define IS_FIRMWARE_COMPATIBLE_WITH_BOARD() (!IS_X12S_PROD())
#endif
#if PCBREV >= 13
#define IS_FIRMWARE_COMPATIBLE_WITH_BOARD() (hardwareOptions.pcbrev == PCBREV_X12S_GTE13)
#else
#define IS_FIRMWARE_COMPATIBLE_WITH_BOARD() (hardwareOptions.pcbrev == PCBREV_X12S_LT13)
#endif
#endif
// SD driver
radio/src/targets/horus/extmodule_driver.cpp
+24 -52
View File
@@ -68,14 +68,14 @@ void extmodulePpmStart()
EXTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN; // Stop timer
EXTMODULE_TIMER->PSC = EXTMODULE_TIMER_FREQ / 2000000 - 1; // 0.5uS (2Mhz)
EXTMODULE_TIMER->ARR = 45000;
#if defined(PCBX10) || PCBREV >= 13
EXTMODULE_TIMER->CCR3 = GET_MODULE_PPM_DELAY(EXTERNAL_MODULE)*2;
EXTMODULE_TIMER->CCER = TIM_CCER_CC3E | (GET_MODULE_PPM_POLARITY(EXTERNAL_MODULE) ? TIM_CCER_CC3P : 0);
EXTMODULE_TIMER->CCMR2 = TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2; // PWM mode 1
EXTMODULE_TIMER->CCMR2 = TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_0; // Force O/P high
EXTMODULE_TIMER->BDTR = TIM_BDTR_MOE;
EXTMODULE_TIMER->EGR = 1; // Reloads register values now
EXTMODULE_TIMER->CCMR2 = TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2; // PWM mode 1
#else
EXTMODULE_TIMER->CCR1 = GET_MODULE_PPM_DELAY(EXTERNAL_MODULE)*2;
EXTMODULE_TIMER->CCER = TIM_CCER_CC1E | (GET_MODULE_PPM_POLARITY(EXTERNAL_MODULE) ? TIM_CCER_CC1P : 0);
@@ -84,6 +84,7 @@ void extmodulePpmStart()
EXTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2PE; // PWM mode 1
#endif
EXTMODULE_TIMER->ARR = 45000;
EXTMODULE_TIMER->CCR2 = 40000; // The first frame will be sent in 20ms
EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF; // Clear flag
EXTMODULE_TIMER->DIER |= TIM_DIER_UDE | TIM_DIER_CC2IE; // Enable this interrupt
@@ -112,24 +113,24 @@ void extmodulePxx1PulsesStart()
EXTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN;
EXTMODULE_TIMER->PSC = EXTMODULE_TIMER_FREQ / 2000000 - 1; // 0.5uS (2Mhz)
EXTMODULE_TIMER->ARR = 18000;
#if defined(PCBX10) || PCBREV >= 13
EXTMODULE_TIMER->CCER = TIM_CCER_CC3E | TIM_CCER_CC3NE;
EXTMODULE_TIMER->BDTR = TIM_BDTR_MOE; // Enable outputs
EXTMODULE_TIMER->CCR3 = 18;
EXTMODULE_TIMER->CCER = TIM_CCER_CC3E | TIM_CCER_CC3NE;
EXTMODULE_TIMER->CCMR2 = TIM_CCMR2_OC3M_2 | TIM_CCMR2_OC3M_0; // Force O/P high
EXTMODULE_TIMER->BDTR = TIM_BDTR_MOE; // Enable outputs
EXTMODULE_TIMER->EGR = 1; // Restart
EXTMODULE_TIMER->CCMR2 = TIM_CCMR2_OC3M_1 | TIM_CCMR2_OC3M_2;
#else
EXTMODULE_TIMER->CCER = TIM_CCER_CC1E | TIM_CCER_CC1P | TIM_CCER_CC1NE | TIM_CCER_CC1NP; // TIM_CCER_CC1E | TIM_CCER_CC1P;
EXTMODULE_TIMER->BDTR = TIM_BDTR_MOE; // Enable outputs
EXTMODULE_TIMER->CCR1 = 18;
EXTMODULE_TIMER->CCER = TIM_CCER_CC1E | TIM_CCER_CC1P | TIM_CCER_CC1NE | TIM_CCER_CC1NP; // TIM_CCER_CC1E | TIM_CCER_CC1P;
EXTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0; // Force O/P high
EXTMODULE_TIMER->BDTR = TIM_BDTR_MOE; // Enable outputs
EXTMODULE_TIMER->EGR = 1; // Restart
EXTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2;
#endif
EXTMODULE_TIMER->ARR = 45000;
EXTMODULE_TIMER->CCR2 = 40000; // The first frame will be sent in 20ms
EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF; // Clear flag
EXTMODULE_TIMER->DIER |= TIM_DIER_UDE | TIM_DIER_CC2IE; // Enable DMA on update
@@ -158,8 +159,7 @@ void extmoduleSerialStart(uint32_t /*baudrate*/, uint32_t period_half_us, bool i
EXTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN;
EXTMODULE_TIMER->PSC = EXTMODULE_TIMER_FREQ / 2000000 - 1; // 0.5uS (2Mhz)
EXTMODULE_TIMER->ARR = period_half_us;
#if defined(PCBX10) || PCBREV >= 13
EXTMODULE_TIMER->CCER = TIM_CCER_CC3E | TIM_CCER_CC3P;
EXTMODULE_TIMER->BDTR = TIM_BDTR_MOE; // Enable outputs
@@ -176,6 +176,7 @@ void extmoduleSerialStart(uint32_t /*baudrate*/, uint32_t period_half_us, bool i
EXTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0;
#endif
EXTMODULE_TIMER->ARR = 45000;
EXTMODULE_TIMER->CCR2 = 40000; // The first frame will be sent in 20ms
EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF; // Clear flag
EXTMODULE_TIMER->DIER |= TIM_DIER_UDE | TIM_DIER_CC2IE;
@@ -276,13 +277,13 @@ void extmoduleSendNextFrame()
EXTMODULE_TIMER->CCER = TIM_CCER_CC3E | (GET_MODULE_PPM_POLARITY(EXTERNAL_MODULE) ? TIM_CCER_CC3P : 0);
EXTMODULE_TIMER->CCR2 = *(extmodulePulsesData.ppm.ptr - 1) - 4000; // 2mS in advance
EXTMODULE_TIMER_DMA_STREAM->CR &= ~DMA_SxCR_EN; // Disable DMA
EXTMODULE_TIMER_DMA_STREAM->CR |= EXTMODULE_TIMER_DMA_CHANNEL | DMA_SxCR_DIR_0 | DMA_SxCR_MINC | DMA_SxCR_PSIZE_0 | DMA_SxCR_MSIZE_0 | DMA_SxCR_PL_0 | DMA_SxCR_PL_1;
EXTMODULE_TIMER_DMA_STREAM->CR |= EXTMODULE_TIMER_DMA_CHANNEL | DMA_SxCR_DIR_0 | DMA_SxCR_MINC | EXTMODULE_TIMER_DMA_SIZE | DMA_SxCR_PL_0 | DMA_SxCR_PL_1;
#else
EXTMODULE_TIMER->CCR1 = GET_MODULE_PPM_DELAY(EXTERNAL_MODULE)*2;
EXTMODULE_TIMER->CCER = TIM_CCER_CC1E | (GET_MODULE_PPM_POLARITY(EXTERNAL_MODULE) ? TIM_CCER_CC1P : 0);
EXTMODULE_TIMER->CCR2 = *(extmodulePulsesData.ppm.ptr - 1) - 4000; // 2mS in advance
EXTMODULE_TIMER_DMA_STREAM->CR &= ~DMA_SxCR_EN; // Disable DMA
EXTMODULE_TIMER_DMA_STREAM->CR |= EXTMODULE_TIMER_DMA_CHANNEL | DMA_SxCR_DIR_0 | DMA_SxCR_MINC | DMA_SxCR_PSIZE_1 | DMA_SxCR_MSIZE_1 | DMA_SxCR_PL_0 | DMA_SxCR_PL_1;
EXTMODULE_TIMER_DMA_STREAM->CR |= EXTMODULE_TIMER_DMA_CHANNEL | DMA_SxCR_DIR_0 | DMA_SxCR_MINC | EXTMODULE_TIMER_DMA_SIZE | DMA_SxCR_PL_0 | DMA_SxCR_PL_1;
#endif
EXTMODULE_TIMER_DMA_STREAM->PAR = CONVERT_PTR_UINT(&EXTMODULE_TIMER->ARR);
EXTMODULE_TIMER_DMA_STREAM->M0AR = CONVERT_PTR_UINT(extmodulePulsesData.ppm.pulses);
@@ -294,11 +295,7 @@ void extmoduleSendNextFrame()
case PROTOCOL_CHANNELS_PXX1_PULSES:
EXTMODULE_TIMER->CCR2 = extmodulePulsesData.pxx.getLast() - 4000; // 2mS in advance
EXTMODULE_TIMER_DMA_STREAM->CR &= ~DMA_SxCR_EN; // Disable DMA
#if defined(PCBX10) || PCBREV >= 13
EXTMODULE_TIMER_DMA_STREAM->CR |= EXTMODULE_TIMER_DMA_CHANNEL | DMA_SxCR_DIR_0 | DMA_SxCR_MINC | DMA_SxCR_PSIZE_0 | DMA_SxCR_MSIZE_0 | DMA_SxCR_PL_0 | DMA_SxCR_PL_1;
#else
EXTMODULE_TIMER_DMA_STREAM->CR |= EXTMODULE_TIMER_DMA_CHANNEL | DMA_SxCR_DIR_0 | DMA_SxCR_MINC | DMA_SxCR_PSIZE_1 | DMA_SxCR_MSIZE_1 | DMA_SxCR_PL_0 | DMA_SxCR_PL_1;
#endif
EXTMODULE_TIMER_DMA_STREAM->CR |= EXTMODULE_TIMER_DMA_CHANNEL | DMA_SxCR_DIR_0 | DMA_SxCR_MINC | EXTMODULE_TIMER_DMA_SIZE | DMA_SxCR_PL_0 | DMA_SxCR_PL_1;
EXTMODULE_TIMER_DMA_STREAM->PAR = CONVERT_PTR_UINT(&EXTMODULE_TIMER->ARR);
EXTMODULE_TIMER_DMA_STREAM->M0AR = CONVERT_PTR_UINT(extmodulePulsesData.pxx.getData());
EXTMODULE_TIMER_DMA_STREAM->NDTR = extmodulePulsesData.pxx.getSize();
@@ -306,7 +303,7 @@ void extmoduleSendNextFrame()
break;
#endif
#if defined(PXX1) && defined(EXTMODULE_USART)
#if defined(PXX1) && defined(HARDWARE_EXTERNAL_MODULE_SIZE_SML)
case PROTOCOL_CHANNELS_PXX1_SERIAL:
extmoduleSendBuffer(extmodulePulsesData.pxx_uart.getData(), extmodulePulsesData.pxx_uart.getSize());
break;
@@ -333,11 +330,7 @@ void extmoduleSendNextFrame()
case PROTOCOL_CHANNELS_MULTIMODULE:
EXTMODULE_TIMER->CCR2 = *(extmodulePulsesData.dsm2.ptr - 1) - 4000; // 2mS in advance
EXTMODULE_TIMER_DMA_STREAM->CR &= ~DMA_SxCR_EN; // Disable DMA
#if defined(PCBX10) || PCBREV >= 13
EXTMODULE_TIMER_DMA_STREAM->CR |= EXTMODULE_TIMER_DMA_CHANNEL | DMA_SxCR_DIR_0 | DMA_SxCR_MINC | DMA_SxCR_PSIZE_0 | DMA_SxCR_MSIZE_0 | DMA_SxCR_PL_0 | DMA_SxCR_PL_1;
#else
EXTMODULE_TIMER_DMA_STREAM->CR |= EXTMODULE_TIMER_DMA_CHANNEL | DMA_SxCR_DIR_0 | DMA_SxCR_MINC | DMA_SxCR_PSIZE_1 | DMA_SxCR_MSIZE_1 | DMA_SxCR_PL_0 | DMA_SxCR_PL_1;
#endif
EXTMODULE_TIMER_DMA_STREAM->CR |= EXTMODULE_TIMER_DMA_CHANNEL | DMA_SxCR_DIR_0 | EXTMODULE_TIMER_DMA_SIZE | DMA_SxCR_MSIZE_1 | DMA_SxCR_PL_0 | DMA_SxCR_PL_1;
EXTMODULE_TIMER_DMA_STREAM->PAR = CONVERT_PTR_UINT(&EXTMODULE_TIMER->ARR);
EXTMODULE_TIMER_DMA_STREAM->M0AR = CONVERT_PTR_UINT(extmodulePulsesData.dsm2.pulses);
EXTMODULE_TIMER_DMA_STREAM->NDTR = extmodulePulsesData.dsm2.ptr - extmodulePulsesData.dsm2.pulses;
@@ -357,42 +350,21 @@ void extmoduleSendNextFrame()
}
}
extern "C" void EXTMODULE_TIMER1_DMA_IRQHandler()
extern "C" void EXTMODULE_TIMER_DMA_IRQHandler()
{
if (!DMA_GetITStatus(EXTMODULE_TIMER1_DMA_STREAM, EXTMODULE_TIMER1_DMA_FLAG_TC))
if (!DMA_GetITStatus(EXTMODULE_TIMER_DMA_STREAM, EXTMODULE_TIMER_DMA_FLAG_TC))
return;
DMA_ClearITPendingBit(EXTMODULE_TIMER1_DMA_STREAM, EXTMODULE_TIMER1_DMA_FLAG_TC);
DMA_ClearITPendingBit(EXTMODULE_TIMER_DMA_STREAM, EXTMODULE_TIMER_DMA_FLAG_TC);
EXTMODULE_TIMER1->SR &= ~TIM_SR_CC2IF; // Clear flag
EXTMODULE_TIMER1->DIER |= TIM_DIER_CC2IE; // Enable this interrupt
EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF; // Clear flag
EXTMODULE_TIMER->DIER |= TIM_DIER_CC2IE; // Enable this interrupt
}
extern "C" void EXTMODULE_TIMER1_IRQHandler()
extern "C" void EXTMODULE_TIMER_IRQHandler()
{
EXTMODULE_TIMER1->DIER &= ~TIM_DIER_CC2IE; // Stop this interrupt
EXTMODULE_TIMER1->SR &= ~TIM_SR_CC2IF;
EXTMODULE_TIMER->DIER &= ~TIM_DIER_CC2IE; // Stop this interrupt
EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF;
if (setupPulsesExternalModule())
extmoduleSendNextFrame();
}
#if defined(EXTMODULE_TIMER2)
extern "C" void EXTMODULE_TIMER2_DMA_IRQHandler()
{
if (!DMA_GetITStatus(EXTMODULE_TIMER2_DMA_STREAM, EXTMODULE_TIMER2_DMA_FLAG_TC))
return;
DMA_ClearITPendingBit(EXTMODULE_TIMER2_DMA_STREAM, EXTMODULE_TIMER2_DMA_FLAG_TC);
EXTMODULE_TIMER2->SR &= ~TIM_SR_CC2IF; // Clear flag
EXTMODULE_TIMER2->DIER |= TIM_DIER_CC2IE; // Enable this interrupt
}
extern "C" void EXTMODULE_TIMER2_IRQHandler()
{
EXTMODULE_TIMER2->DIER &= ~TIM_DIER_CC2IE; // Stop this interrupt
EXTMODULE_TIMER2->SR &= ~TIM_SR_CC2IF;
if (setupPulsesExternalModule())
extmoduleSendNextFrame();
}
#endif
radio/src/targets/horus/hal.h
+22 -27
View File
@@ -606,36 +606,28 @@
// External Module
#define EXTMODULE_PWR_GPIO GPIOB
#define EXTMODULE_PWR_GPIO_PIN GPIO_Pin_3 // PB.03
#if defined(PCBX10)
#define EXTMODULE_RCC_AHB1Periph (RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB | RCC_AHB1Periph_DMA1 | RCC_AHB1Periph_DMA2)
#if defined(PCBX10) && defined(PCBREV_EXPRESS)
#define EXTMODULE_RCC_AHB1Periph (RCC_AHB1Periph_GPIOB | RCC_AHB1Periph_DMA1)
#define EXTMODULE_RCC_APB1Periph (RCC_APB1Periph_TIM2 | RCC_APB1Periph_USART3)
#define EXTMODULE_RCC_APB2Periph (RCC_APB2Periph_TIM1 | )
#define EXTMODULE_TX_GPIO (IS_X10_EXPRESS() ? GPIOB : GPIOA)
#define EXTMODULE_RCC_APB2Periph 0
#define EXTMODULE_TX_GPIO GPIOB
#define EXTMODULE_USART_GPIO EXTMODULE_TX_GPIO
#define EXTMODULE_TX_GPIO_PIN GPIO_Pin_10 // PB.10 (TIM2_CH3) on X10 Express, PA.10 (TIM1_CH3) on X10
#define EXTMODULE_TX_GPIO_PIN GPIO_Pin_10 // PB.10 (TIM2_CH3)
#define EXTMODULE_TX_GPIO_PinSource GPIO_PinSource10
#define EXTMODULE_RX_GPIO_PIN GPIO_Pin_11 // PB.11
#define EXTMODULE_RX_GPIO_PinSource GPIO_PinSource11
#define EXTMODULE_TIMER_TX_GPIO_AF (IS_X10_EXPRESS() ? GPIO_AF_TIM2 : GPIO_AF_TIM1)
#define EXTMODULE_TIMER1 TIM1
#define EXTMODULE_TIMER2 TIM2
#define EXTMODULE_TIMER (IS_X10_EXPRESS() ? EXTMODULE_TIMER2 : EXTMODULE_TIMER1)
#define EXTMODULE_TIMER_FREQ (IS_X10_EXPRESS() ? (PERI1_FREQUENCY * TIMER_MULT_APB1) : (PERI2_FREQUENCY * TIMER_MULT_APB2))
#define EXTMODULE_TIMER_CC_IRQn (IS_X10_EXPRESS() ? TIM2_IRQn : TIM1_CC_IRQn)
#define EXTMODULE_TIMER1_IRQHandler TIM1_CC_IRQHandler
#define EXTMODULE_TIMER2_IRQHandler TIM2_IRQHandler
#define EXTMODULE_TIMER1_DMA_CHANNEL DMA_Channel_6
#define EXTMODULE_TIMER1_DMA_STREAM DMA2_Stream5
#define EXTMODULE_TIMER1_DMA_FLAG_TC DMA_IT_TCIF5
#define EXTMODULE_TIMER2_DMA_CHANNEL DMA_Channel_3
#define EXTMODULE_TIMER2_DMA_STREAM DMA1_Stream1
#define EXTMODULE_TIMER2_DMA_FLAG_TC DMA_IT_TCIF1
#define EXTMODULE_TIMER_DMA_CHANNEL (IS_X10_EXPRESS() ? EXTMODULE_TIMER2_DMA_CHANNEL : EXTMODULE_TIMER1_DMA_CHANNEL)
#define EXTMODULE_TIMER_DMA_STREAM (IS_X10_EXPRESS() ? EXTMODULE_TIMER2_DMA_STREAM : EXTMODULE_TIMER1_DMA_STREAM)
#define EXTMODULE_TIMER_DMA_FLAG_TC (IS_X10_EXPRESS() ? EXTMODULE_TIMER2_DMA_FLAG_TC : EXTMODULE_TIMER1_DMA_FLAG_TC)
#define EXTMODULE_TIMER_DMA_STREAM_IRQn (IS_X10_EXPRESS() ? DMA1_Stream1_IRQn : DMA2_Stream5_IRQn)
#define EXTMODULE_TIMER1_DMA_IRQHandler DMA2_Stream5_IRQHandler
#define EXTMODULE_TIMER2_DMA_IRQHandler DMA1_Stream1_IRQHandler
#define EXTMODULE_TIMER_TX_GPIO_AF GPIO_AF_TIM2
#define EXTMODULE_TIMER TIM2
#define EXTMODULE_TIMER_32BITS
#define EXTMODULE_TIMER_DMA_SIZE (DMA_SxCR_PSIZE_1 | DMA_SxCR_MSIZE_1)
#define EXTMODULE_TIMER_FREQ (PERI1_FREQUENCY * TIMER_MULT_APB1)
#define EXTMODULE_TIMER_CC_IRQn TIM2_IRQn
#define EXTMODULE_TIMER_IRQHandler TIM2_IRQHandler
#define EXTMODULE_TIMER_DMA_CHANNEL DMA_Channel_3
#define EXTMODULE_TIMER_DMA_STREAM DMA1_Stream1
#define EXTMODULE_TIMER_DMA_FLAG_TC DMA_IT_TCIF1
#define EXTMODULE_TIMER_DMA_STREAM_IRQn DMA1_Stream1_IRQn
#define EXTMODULE_TIMER_DMA_IRQHandler DMA1_Stream1_IRQHandler
#define EXTMODULE_USART_GPIO_AF GPIO_AF_USART3
#define EXTMODULE_USART USART3
#define EXTMODULE_USART_IRQn USART3_IRQn
@@ -644,7 +636,7 @@
#define EXTMODULE_USART_TX_DMA_STREAM DMA1_Stream3
#define EXTMODULE_USART_RX_DMA_CHANNEL DMA_Channel_4
#define EXTMODULE_USART_RX_DMA_STREAM DMA1_Stream1
#elif PCBREV >= 13
#elif defined(PCBX10) || PCBREV >= 13
#define EXTMODULE_RCC_AHB1Periph (RCC_AHB1Periph_GPIOA | RCC_AHB1Periph_GPIOB | RCC_AHB1Periph_DMA2)
#define EXTMODULE_RCC_APB1Periph 0
#define EXTMODULE_RCC_APB2Periph RCC_APB2Periph_TIM1
@@ -653,6 +645,7 @@
#define EXTMODULE_TX_GPIO_PinSource GPIO_PinSource10
#define EXTMODULE_TIMER_TX_GPIO_AF GPIO_AF_TIM1
#define EXTMODULE_TIMER TIM1
#define EXTMODULE_TIMER_DMA_SIZE (DMA_SxCR_PSIZE_0 | DMA_SxCR_MSIZE_0)
#define EXTMODULE_TIMER_CC_IRQn TIM1_CC_IRQn
#define EXTMODULE_TIMER1_IRQHandler TIM1_CC_IRQHandler
#define EXTMODULE_TIMER_FREQ (PERI2_FREQUENCY * TIMER_MULT_APB2)
@@ -666,10 +659,12 @@
#define EXTMODULE_RCC_APB1Periph RCC_APB1Periph_TIM2
#define EXTMODULE_RCC_APB2Periph 0
#define EXTMODULE_TX_GPIO GPIOA
#define EXTMODULE_TX_GPIO_PIN GPIO_Pin_15 // PA.15
#define EXTMODULE_TX_GPIO_PIN GPIO_Pin_15 // PA.15 (TIM2_CH1)
#define EXTMODULE_TX_GPIO_PinSource GPIO_PinSource15
#define EXTMODULE_TIMER_TX_GPIO_AF GPIO_AF_TIM2
#define EXTMODULE_TIMER TIM2
#define EXTMODULE_TIMER_32BITS
#define EXTMODULE_TIMER_DMA_SIZE (DMA_SxCR_PSIZE_1 | DMA_SxCR_MSIZE_1)
#define EXTMODULE_TIMER_CC_IRQn TIM2_IRQn
#define EXTMODULE_TIMER1_IRQHandler TIM2_IRQHandler
#define EXTMODULE_TIMER_FREQ (PERI1_FREQUENCY * TIMER_MULT_APB1)
radio/src/targets/taranis/extmodule_driver.cpp
+3 -3
View File
@@ -64,7 +64,6 @@ void extmodulePpmStart()
EXTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN;
EXTMODULE_TIMER->PSC = EXTMODULE_TIMER_FREQ / 2000000 - 1; // 0.5uS from 30MHz
EXTMODULE_TIMER->ARR = 45000;
EXTMODULE_TIMER->CCR1 = GET_MODULE_PPM_DELAY(EXTERNAL_MODULE)*2;
EXTMODULE_TIMER->CCER = EXTMODULE_TIMER_OUTPUT_ENABLE | (GET_MODULE_PPM_POLARITY(EXTERNAL_MODULE) ? EXTMODULE_TIMER_OUTPUT_POLARITY : 0); // // we are using complementary output so logic has to be reversed here
EXTMODULE_TIMER->BDTR = TIM_BDTR_MOE;
@@ -72,6 +71,7 @@ void extmodulePpmStart()
EXTMODULE_TIMER->EGR = 1;
EXTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC2PE; // PWM mode 1
EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF; // Clear flag
EXTMODULE_TIMER->ARR = 45000;
EXTMODULE_TIMER->CCR2 = 40000; // The first frame will be sent in 20ms
EXTMODULE_TIMER->DIER |= TIM_DIER_UDE | TIM_DIER_CC2IE;
EXTMODULE_TIMER->CR1 |= TIM_CR1_CEN;
@@ -98,13 +98,13 @@ void extmoduleSerialStart(uint32_t /*baudrate*/, uint32_t period_half_us, bool i
EXTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN;
EXTMODULE_TIMER->PSC = EXTMODULE_TIMER_FREQ / 2000000 - 1; // 0.5uS from 30MHz
EXTMODULE_TIMER->ARR = period_half_us;
EXTMODULE_TIMER->CCER = EXTMODULE_TIMER_OUTPUT_ENABLE | (inverted ? 0 : EXTMODULE_TIMER_OUTPUT_POLARITY);
EXTMODULE_TIMER->BDTR = TIM_BDTR_MOE; // Enable outputs
EXTMODULE_TIMER->CCR1 = 0;
EXTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0; // Force O/P high
EXTMODULE_TIMER->EGR = 1; // Restart
EXTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_0;
EXTMODULE_TIMER->ARR = 45000;
EXTMODULE_TIMER->CCR2 = 40000; // The first frame will be sent in 20ms
EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF; // Clear flag
EXTMODULE_TIMER->DIER |= TIM_DIER_UDE | TIM_DIER_CC2IE;
@@ -213,13 +213,13 @@ void extmodulePxx1PulsesStart()
EXTMODULE_TIMER->CR1 &= ~TIM_CR1_CEN;
EXTMODULE_TIMER->PSC = EXTMODULE_TIMER_FREQ / 2000000 - 1; // 0.5uS (2Mhz)
EXTMODULE_TIMER->ARR = PXX_PULSES_PERIOD * 2000; // 0.5uS (2Mhz)
EXTMODULE_TIMER->CCER = EXTMODULE_TIMER_OUTPUT_ENABLE | EXTMODULE_TIMER_OUTPUT_POLARITY; // polarity, default low
EXTMODULE_TIMER->BDTR = TIM_BDTR_MOE; // Enable outputs
EXTMODULE_TIMER->CCR1 = 18;
EXTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC1M_2 | TIM_CCMR1_OC1M_0; // Force O/P high
EXTMODULE_TIMER->EGR = 1; // Restart
EXTMODULE_TIMER->CCMR1 = TIM_CCMR1_OC1M_1 | TIM_CCMR1_OC1M_2;
EXTMODULE_TIMER->ARR = 45000;
EXTMODULE_TIMER->CCR2 = 40000; // The first frame will be sent in 20ms
EXTMODULE_TIMER->SR &= ~TIM_SR_CC2IF; // Clear flag
EXTMODULE_TIMER->DIER |= TIM_DIER_UDE | TIM_DIER_CC2IE;