fix: clear internal module FIFO after DMA init (#2527)

Otherwise, NDTR will be 0 instead of [buffer size], and thus the read index will not be set to the correct value.
This commit is contained in:
Raphael Coeffic
2022-10-13 09:33:51 +10:00
committed by GitHub
parent ed6cb9ffc7
commit ffe4fe7e17
@@ -148,10 +148,10 @@ void* intmoduleSerialStart(const etx_serial_init* params)
stm32_usart_init(&intmoduleUSART, params);
intmoduleCtx.rxFifo->clear();
if (params->rx_enable && intmoduleUSART.rxDMA) {
stm32_usart_init_rx_dma(&intmoduleUSART, intmoduleFifo.buffer(), intmoduleFifo.size());
}
intmoduleCtx.rxFifo->clear();
return (void*)&intmoduleCtx;
}