Raphael CoefficandGitHub
1bb27e7011
* fix: PWM gimbals initialisation and inversion * feat: add periph clock support in PWM stick driver
337 lines
8.9 KiB
C++
337 lines
8.9 KiB
C++
/*
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* Copyright (C) EdgeTx
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*
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* Based on code named
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* opentx - https://github.com/opentx/opentx
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* th9x - http://code.google.com/p/th9x
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* er9x - http://code.google.com/p/er9x
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* gruvin9x - http://code.google.com/p/gruvin9x
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*
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* License GPLv2: http://www.gnu.org/licenses/gpl-2.0.html
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "stm32_pulse_driver.h"
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#include "stm32_timer.h"
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#include "stm32_dma.h"
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#include "definitions.h"
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#include <string.h>
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// 0.5uS (2Mhz)
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#define STM32_DEFAULT_TIMER_FREQ 2000000
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#define STM32_DEFAULT_TIMER_AUTORELOAD 65535
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// TODO:
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// - DMA IRQ prio configurable (now 7)
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// - Timer IRQ prio configurable (now 7)
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void stm32_pulse_init(const stm32_pulse_timer_t* tim, uint32_t freq)
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{
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if (tim->DMA_TC_CallbackPtr) {
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memset(tim->DMA_TC_CallbackPtr, 0, sizeof(stm32_pulse_dma_tc_cb_t));
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}
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LL_GPIO_InitTypeDef pinInit;
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LL_GPIO_StructInit(&pinInit);
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pinInit.Pin = tim->GPIO_Pin;
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pinInit.Mode = LL_GPIO_MODE_ALTERNATE;
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pinInit.Alternate = tim->GPIO_Alternate;
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LL_GPIO_Init(tim->GPIOx, &pinInit);
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LL_TIM_InitTypeDef timInit;
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LL_TIM_StructInit(&timInit);
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if (!freq) {
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freq = STM32_DEFAULT_TIMER_FREQ;
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}
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timInit.Prescaler = __LL_TIM_CALC_PSC(tim->TIM_Freq, freq);
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timInit.Autoreload = STM32_DEFAULT_TIMER_AUTORELOAD;
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stm32_timer_enable_clock(tim->TIMx);
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LL_TIM_Init(tim->TIMx, &timInit);
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if (tim->DMAx) {
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// Enable DMA IRQ
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NVIC_EnableIRQ(tim->DMA_IRQn);
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NVIC_SetPriority(tim->DMA_IRQn, 7);
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}
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// Enable timer IRQ
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NVIC_EnableIRQ(tim->TIM_IRQn);
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NVIC_SetPriority(tim->TIM_IRQn, 7);
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}
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void stm32_pulse_deinit(const stm32_pulse_timer_t* tim)
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{
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// Disable IRQs
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if (tim->DMAx) {
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NVIC_DisableIRQ(tim->DMA_IRQn);
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}
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NVIC_DisableIRQ(tim->TIM_IRQn);
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if (tim->DMAx) {
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LL_DMA_DeInit(tim->DMAx, tim->DMA_Stream);
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}
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if (tim->DMA_TC_CallbackPtr) {
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memset(tim->DMA_TC_CallbackPtr, 0, sizeof(stm32_pulse_dma_tc_cb_t));
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}
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LL_TIM_DeInit(tim->TIMx);
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stm32_timer_disable_clock(tim->TIMx);
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// Reconfigure pin as input
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LL_GPIO_InitTypeDef pinInit;
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LL_GPIO_StructInit(&pinInit);
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pinInit.Pin = tim->GPIO_Pin;
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pinInit.Mode = LL_GPIO_MODE_INPUT;
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LL_GPIO_Init(tim->GPIOx, &pinInit);
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}
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void stm32_pulse_config_output(const stm32_pulse_timer_t* tim, bool polarity,
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uint32_t ocmode, uint32_t cmp_val)
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{
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LL_TIM_OC_InitTypeDef ocInit;
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LL_TIM_OC_StructInit(&ocInit);
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ocInit.OCMode = ocmode;
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ocInit.CompareValue = cmp_val;
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uint32_t channel = tim->TIM_Channel;
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if (tim->TIM_Channel != LL_TIM_CHANNEL_CH1N) {
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ocInit.OCState = LL_TIM_OCSTATE_ENABLE;
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ocInit.OCNState = LL_TIM_OCSTATE_DISABLE;
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} else {
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ocInit.OCState = LL_TIM_OCSTATE_DISABLE;
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ocInit.OCNState = LL_TIM_OCSTATE_ENABLE;
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channel = LL_TIM_CHANNEL_CH1;
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}
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uint32_t ll_polarity;
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if (polarity) {
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ll_polarity = LL_TIM_OCPOLARITY_HIGH;
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} else {
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ll_polarity = LL_TIM_OCPOLARITY_LOW;
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}
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if (tim->TIM_Channel != LL_TIM_CHANNEL_CH1N) {
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ocInit.OCPolarity = ll_polarity;
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} else {
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ocInit.OCNPolarity = ll_polarity;
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}
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LL_TIM_OC_Init(tim->TIMx, channel, &ocInit);
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LL_TIM_OC_EnablePreload(tim->TIMx, channel);
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if (IS_TIM_BREAK_INSTANCE(tim->TIMx)) {
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LL_TIM_EnableAllOutputs(tim->TIMx);
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}
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}
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void stm32_pulse_set_polarity(const stm32_pulse_timer_t* tim, bool polarity)
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{
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uint32_t ll_polarity;
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if (polarity) {
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ll_polarity = LL_TIM_OCPOLARITY_HIGH;
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} else {
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ll_polarity = LL_TIM_OCPOLARITY_LOW;
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}
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LL_TIM_OC_SetPolarity(tim->TIMx, tim->TIM_Channel, ll_polarity);
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}
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bool stm32_pulse_get_polarity(const stm32_pulse_timer_t* tim)
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{
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return LL_TIM_OC_GetPolarity(tim->TIMx, tim->TIM_Channel) ==
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LL_TIM_OCPOLARITY_HIGH;
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}
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// return true if stopped, false otherwise
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bool stm32_pulse_if_not_running_disable(const stm32_pulse_timer_t* tim)
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{
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if (LL_DMA_IsEnabledStream(tim->DMAx, tim->DMA_Stream))
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return false;
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// disable timer
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LL_TIM_DisableCounter(tim->TIMx);
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LL_TIM_DisableIT_UPDATE(tim->TIMx);
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return true;
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}
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static void set_compare_reg(const stm32_pulse_timer_t* tim, uint32_t val)
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{
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switch(tim->TIM_Channel){
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case LL_TIM_CHANNEL_CH1:
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case LL_TIM_CHANNEL_CH1N:
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LL_TIM_OC_SetCompareCH1(tim->TIMx, val);
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break;
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case LL_TIM_CHANNEL_CH2:
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LL_TIM_OC_SetCompareCH2(tim->TIMx, val);
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break;
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case LL_TIM_CHANNEL_CH3:
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LL_TIM_OC_SetCompareCH3(tim->TIMx, val);
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break;
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case LL_TIM_CHANNEL_CH4:
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LL_TIM_OC_SetCompareCH4(tim->TIMx, val);
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break;
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}
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}
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void stm32_pulse_set_cmp_val(const stm32_pulse_timer_t* tim, uint32_t cmp_val)
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{
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set_compare_reg(tim, cmp_val);
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}
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static void set_oc_mode(const stm32_pulse_timer_t* tim, uint32_t ocmode)
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{
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uint32_t channel = tim->TIM_Channel;
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if (channel == LL_TIM_CHANNEL_CH1N)
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channel = LL_TIM_CHANNEL_CH1;
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LL_TIM_OC_SetMode(tim->TIMx, channel, ocmode);
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}
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void stm32_pulse_wait_for_completed(const stm32_pulse_timer_t* tim)
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{
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uint32_t channel = tim->TIM_Channel;
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if (channel == LL_TIM_CHANNEL_CH1N)
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channel = LL_TIM_CHANNEL_CH1;
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while(LL_TIM_IsEnabledCounter(tim->TIMx) &&
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LL_TIM_OC_GetMode(tim->TIMx, channel) != LL_TIM_OCMODE_FORCED_INACTIVE);
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}
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static void force_start_level(const stm32_pulse_timer_t* tim)
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{
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uint32_t channel = tim->TIM_Channel;
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if (channel == LL_TIM_CHANNEL_CH1N)
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channel = LL_TIM_CHANNEL_CH1;
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uint32_t mode = LL_TIM_OC_GetMode(tim->TIMx, channel);
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LL_TIM_OC_SetMode(tim->TIMx, channel, LL_TIM_OCMODE_FORCED_ACTIVE);
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LL_TIM_OC_SetMode(tim->TIMx, channel, mode);
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}
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void stm32_pulse_start_dma_req(const stm32_pulse_timer_t* tim,
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const void* pulses, uint16_t length,
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uint32_t ocmode, uint32_t cmp_val)
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{
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// Re-configure timer output
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set_compare_reg(tim, cmp_val);
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set_oc_mode(tim, ocmode);
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// re-init DMA stream
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LL_DMA_DeInit(tim->DMAx, tim->DMA_Stream);
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LL_DMA_InitTypeDef dmaInit;
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LL_DMA_StructInit(&dmaInit);
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// Direction
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dmaInit.Direction = LL_DMA_DIRECTION_MEMORY_TO_PERIPH;
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// Source
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dmaInit.MemoryOrM2MDstAddress = CONVERT_PTR_UINT(pulses);
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dmaInit.MemoryOrM2MDstIncMode = LL_DMA_MEMORY_INCREMENT;
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// Destination
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dmaInit.PeriphOrM2MSrcAddress = CONVERT_PTR_UINT(&tim->TIMx->ARR);
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dmaInit.PeriphOrM2MSrcIncMode = LL_DMA_PERIPH_NOINCREMENT;
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// Data width
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if (IS_TIM_32B_COUNTER_INSTANCE(tim->TIMx)) {
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// TODO: try using 16-bit source as well
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dmaInit.MemoryOrM2MDstDataSize = LL_DMA_MDATAALIGN_WORD;
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dmaInit.PeriphOrM2MSrcDataSize = LL_DMA_PDATAALIGN_WORD;
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} else {
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dmaInit.MemoryOrM2MDstDataSize = LL_DMA_MDATAALIGN_HALFWORD;
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dmaInit.PeriphOrM2MSrcDataSize = LL_DMA_PDATAALIGN_HALFWORD;
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}
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dmaInit.NbData = length;
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dmaInit.Channel = tim->DMA_Channel;
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dmaInit.Priority = LL_DMA_PRIORITY_VERYHIGH;
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LL_DMA_Init(tim->DMAx, tim->DMA_Stream, &dmaInit);
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// Enable TC IRQ
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LL_DMA_EnableIT_TC(tim->DMAx, tim->DMA_Stream);
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if (ocmode == LL_TIM_OCMODE_PWM1) {
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// preloads first period for PWM)
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LL_TIM_SetCounter(tim->TIMx, 0x00);
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LL_TIM_GenerateEvent_UPDATE(tim->TIMx);
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} else {
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// Reset counter close to overflow
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if (IS_TIM_32B_COUNTER_INSTANCE(tim->TIMx)) {
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LL_TIM_SetCounter(tim->TIMx, 0xFFFFFFFF);
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} else {
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LL_TIM_SetCounter(tim->TIMx, 0xFFFF);
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}
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}
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LL_TIM_EnableDMAReq_UPDATE(tim->TIMx);
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LL_DMA_EnableStream(tim->DMAx, tim->DMA_Stream);
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// Trigger update to effect the first DMA transaction
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// and thus load ARR with the first duration
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// start timer
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LL_TIM_EnableCounter(tim->TIMx);
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}
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void stm32_pulse_dma_tc_isr(const stm32_pulse_timer_t* tim)
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{
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if (!stm32_dma_check_tc_flag(tim->DMAx, tim->DMA_Stream))
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return;
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if (tim->DMA_TC_CallbackPtr) {
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auto closure = tim->DMA_TC_CallbackPtr;
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if (closure->cb && closure->cb(closure->ctx)) {
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return;
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}
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}
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LL_TIM_ClearFlag_UPDATE(tim->TIMx);
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LL_TIM_EnableIT_UPDATE(tim->TIMx);
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// PWM mode with compare value = 0 then OCxRef is held at ‘0’
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set_compare_reg(tim, 0);
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set_oc_mode(tim, LL_TIM_OCMODE_PWM1);
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}
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void stm32_pulse_tim_update_isr(const stm32_pulse_timer_t* tim)
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{
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if (!LL_TIM_IsActiveFlag_UPDATE(tim->TIMx))
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return;
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LL_TIM_ClearFlag_UPDATE(tim->TIMx);
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LL_TIM_DisableIT_UPDATE(tim->TIMx);
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// Halt pulses by forcing to inactive level
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set_oc_mode(tim, LL_TIM_OCMODE_FORCED_INACTIVE);
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LL_TIM_DisableCounter(tim->TIMx);
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}
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// input mode
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void stm32_pulse_config_input(const stm32_pulse_timer_t* tim)
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{
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LL_TIM_IC_InitTypeDef icInit;
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LL_TIM_IC_StructInit(&icInit);
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icInit.ICActiveInput = LL_TIM_ACTIVEINPUT_DIRECTTI;
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icInit.ICFilter = LL_TIM_IC_FILTER_FDIV1_N8;
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LL_TIM_IC_Init(tim->TIMx, tim->TIM_Channel, &icInit);
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}
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