192 lines
6.4 KiB
C++
192 lines
6.4 KiB
C++
/*
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* Copyright (C) OpenTX
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*
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* Based on code named
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* th9x - http://code.google.com/p/th9x
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* er9x - http://code.google.com/p/er9x
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* gruvin9x - http://code.google.com/p/gruvin9x
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*
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* License GPLv2: http://www.gnu.org/licenses/gpl-2.0.html
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include "opentx.h"
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#define setupTrainerPulses() setupPulsesPPM(TRAINER_MODULE)
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void init_trainer_ppm()
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{
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trainerPulsesData.ppm.ptr = trainerPulsesData.ppm.pulses;
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configure_pins(TRAINER_GPIO_PIN_OUT, PIN_PERIPHERAL | PIN_PORTC | PIN_PER_2 | PIN_OS25);
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TRAINER_TIMER->CR1 &= ~TIM_CR1_CEN;
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// setupTrainerPulses() is also configuring registers,
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// so it has to be called after the peripheral is enabled
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setupTrainerPulses();
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TRAINER_TIMER->ARR = *trainerPulsesData.ppm.ptr++;
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TRAINER_TIMER->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 2000000 - 1; // 0.5uS
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TRAINER_TIMER->CCMR1 = TIM_CCMR1_OC2M_1 | TIM_CCMR1_OC2M_2 | TIM_CCMR1_OC2PE; // PWM mode 1
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TRAINER_TIMER->BDTR = TIM_BDTR_MOE;
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TRAINER_TIMER->EGR = 1;
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TRAINER_TIMER->SR &= ~TIM_SR_UIF; // Clear flag
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TRAINER_TIMER->SR &= ~TIM_SR_CC1IF; // Clear flag
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TRAINER_TIMER->DIER |= TIM_DIER_CC1IE;
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TRAINER_TIMER->DIER |= TIM_DIER_UIE;
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TRAINER_TIMER->CR1 = TIM_CR1_CEN;
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NVIC_EnableIRQ(TRAINER_TIMER_IRQn);
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NVIC_SetPriority(TRAINER_TIMER_IRQn, 7);
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}
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void stop_trainer_ppm()
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{
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configure_pins(TRAINER_GPIO_PIN_OUT, PIN_INPUT | PIN_PORTC); // Pin as input
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TRAINER_TIMER->DIER = 0; // Stop Interrupt
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TRAINER_TIMER->CR1 &= ~TIM_CR1_CEN; // Stop counter
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NVIC_DisableIRQ(TRAINER_TIMER_IRQn); // Stop Interrupt
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}
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void set_trainer_ppm_parameters(uint32_t idleTime, uint32_t delay, uint32_t positive)
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{
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TRAINER_TIMER->CCR1 = idleTime;
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TRAINER_TIMER->CCR2 = delay;
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TRAINER_TIMER->CCER = TIM_CCER_CC2E | (positive ? TIM_CCER_CC2P : 0);
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}
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void init_trainer_capture()
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{
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GPIO_InitTypeDef GPIO_InitStructure;
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GPIO_InitStructure.GPIO_Pin = TRAINER_GPIO_PIN_IN;
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GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF;
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GPIO_InitStructure.GPIO_OType = GPIO_OType_PP;
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GPIO_InitStructure.GPIO_Speed = GPIO_Speed_2MHz;
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GPIO_InitStructure.GPIO_PuPd = GPIO_PuPd_NOPULL;
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GPIO_Init(TRAINER_GPIO, &GPIO_InitStructure);
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GPIO_PinAFConfig(TRAINER_GPIO, TRAINER_GPIO_PinSource_IN, TRAINER_GPIO_AF);
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TRAINER_TIMER->ARR = 0xFFFF;
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TRAINER_TIMER->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 2000000 - 1; // 0.5uS
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TRAINER_TIMER->CR2 = 0;
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TRAINER_TIMER->CCMR1 = TIM_CCMR1_IC1F_0 | TIM_CCMR1_IC1F_1 | TIM_CCMR1_CC1S_0;
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TRAINER_TIMER->CCER = TIM_CCER_CC1E;
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TRAINER_TIMER->SR &= ~TIM_SR_CC1IF & ~TIM_SR_CC2IF & ~TIM_SR_UIF; // Clear flags
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TRAINER_TIMER->DIER |= TIM_DIER_CC1IE;
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TRAINER_TIMER->CR1 = TIM_CR1_CEN;
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NVIC_EnableIRQ(TRAINER_TIMER_IRQn);
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NVIC_SetPriority(TRAINER_TIMER_IRQn, 7);
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}
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void stop_trainer_capture()
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{
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TRAINER_TIMER->CR1 &= ~TIM_CR1_CEN; // Stop counter
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TRAINER_TIMER->DIER = 0; // Stop Interrupt
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NVIC_DisableIRQ(TRAINER_TIMER_IRQn); // Stop Interrupt
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}
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#if !defined(SIMU)
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extern "C" void TRAINER_TIMER_IRQHandler()
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{
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DEBUG_INTERRUPT(INT_TRAINER);
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uint16_t capture = 0;
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bool doCapture = false;
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// What mode? in or out?
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if ((TRAINER_TIMER->DIER & TIM_DIER_CC1IE) && (TRAINER_TIMER->SR & TIM_SR_CC1IF)) {
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// capture mode on trainer jack
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capture = TRAINER_TIMER->CCR1;
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if (TRAINER_CONNECTED() && currentTrainerMode == TRAINER_MODE_MASTER_TRAINER_JACK) {
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doCapture = true;
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}
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}
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if (doCapture) {
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captureTrainerPulses(capture);
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}
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// PPM out compare interrupt
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if ((TRAINER_TIMER->DIER & TIM_DIER_CC1IE) && (TRAINER_TIMER->SR & TIM_SR_CC1IF)) {
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// compare interrupt
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TRAINER_TIMER->DIER &= ~TIM_DIER_CC1IE; // stop this interrupt
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TRAINER_TIMER->SR &= ~TIM_SR_CC1IF; // Clear flag
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setupTrainerPulses();
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trainerPulsesData.ppm.ptr = trainerPulsesData.ppm.pulses;
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TRAINER_TIMER->DIER |= TIM_DIER_UDE;
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TRAINER_TIMER->SR &= ~TIM_SR_UIF; // Clear this flag
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TRAINER_TIMER->DIER |= TIM_DIER_UIE; // Enable this interrupt
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}
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// PPM out update interrupt
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if ((TRAINER_TIMER->DIER & TIM_DIER_UIE) && (TRAINER_TIMER->SR & TIM_SR_UIF)) {
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TRAINER_TIMER->SR &= ~TIM_SR_UIF; // Clear flag
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TRAINER_TIMER->ARR = *trainerPulsesData.ppm.ptr++;
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if (*trainerPulsesData.ppm.ptr == 0) {
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TRAINER_TIMER->SR &= ~TIM_SR_CC1IF; // Clear this flag
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TRAINER_TIMER->DIER |= TIM_DIER_CC1IE; // Enable this interrupt
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}
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}
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}
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extern "C" void HEARTBEAT_TIMER_IRQHandler()
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{
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uint16_t capture = 0;
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bool doCapture = false;
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if ((HEARTBEAT_TIMER->DIER & TIM_DIER_CC2IE ) && (HEARTBEAT_TIMER->SR & TIM_SR_CC2IF)) {
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// capture mode on heartbeat pin (external module)
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capture = HEARTBEAT_TIMER->CCR2;
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if (currentTrainerMode == TRAINER_MODE_MASTER_CPPM_EXTERNAL_MODULE) {
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doCapture = true;
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}
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}
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if (doCapture) {
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captureTrainerPulses(capture);
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}
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}
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#endif
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void init_cppm_on_heartbeat_capture(void)
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{
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EXTERNAL_MODULE_ON();
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configure_pins(HEARTBEAT_GPIO_PIN, PIN_PERIPHERAL | PIN_PORTD | PIN_PER_2);
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HEARTBEAT_TIMER->ARR = 0xFFFF;
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HEARTBEAT_TIMER->PSC = (PERI1_FREQUENCY * TIMER_MULT_APB1) / 2000000 - 1; // 0.5uS
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HEARTBEAT_TIMER->CR2 = 0;
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HEARTBEAT_TIMER->CCMR1 = TIM_CCMR1_IC2F_0 | TIM_CCMR1_IC2F_1 | TIM_CCMR1_CC2S_0;
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HEARTBEAT_TIMER->CCER = TIM_CCER_CC2E;
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HEARTBEAT_TIMER->SR &= ~TIM_SR_CC2IF; // Clear flag
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HEARTBEAT_TIMER->DIER |= TIM_DIER_CC2IE;
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HEARTBEAT_TIMER->CR1 = TIM_CR1_CEN;
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NVIC_SetPriority(HEARTBEAT_TIMER_IRQn, 7);
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NVIC_EnableIRQ(HEARTBEAT_TIMER_IRQn);
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}
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void stop_cppm_on_heartbeat_capture(void)
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{
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HEARTBEAT_TIMER->DIER = 0;
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HEARTBEAT_TIMER->CR1 &= ~TIM_CR1_CEN; // Stop counter
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NVIC_DisableIRQ(HEARTBEAT_TIMER_IRQn); // Stop Interrupt
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if (!IS_EXTERNAL_MODULE_PRESENT()) {
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EXTERNAL_MODULE_OFF();
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}
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}
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