bsongis
cb073fa549
Some flash saved on stock GPS calculations flash saving (around 100bytes, needs to be tested)
275 lines
8.5 KiB
C++
275 lines
8.5 KiB
C++
/****************************************************************************
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* Copyright (c) 2011 by Michael Blandford. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the author nor the names of its contributors may
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* be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
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* THE COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
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* OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
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* AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF
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* THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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****************************************************************************
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* History:
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*
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****************************************************************************/
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#include "../open9x.h"
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volatile uint8_t Buzzer_count ;
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// Must NOT be in flash, PDC needs a RAM source.
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uint16_t Sine_values[] =
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{
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2048,2173,2298,2422,2545,2666,2784,2899,3011,3119,
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3223,3322,3417,3505,3589,3666,3736,3800,3857,3907,
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3950,3985,4012,4032,4044,4048,4044,4032,4012,3985,
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3950,3907,3857,3800,3736,3666,3589,3505,3417,3322,
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3223,3119,3011,2899,2784,2666,2545,2422,2298,2173,
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2048,1922,1797,1673,1550,1429,1311,1196,1084, 976,
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872, 773, 678, 590, 506, 429, 359, 295, 238, 188,
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145, 110, 83, 63, 51, 48, 51, 63, 83, 110,
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145, 188, 238, 295, 359, 429, 506, 590, 678, 773,
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872, 976,1084,1196,1311,1429,1550,1673,1797,1922
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} ;
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// Sound routines
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void startSound()
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{
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register Pio *pioptr ;
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start_timer1() ;
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initDac() ;
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init_twi() ;
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pioptr = PIOA ;
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#ifdef REVB
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pioptr->PIO_CODR = 0x02000000L ; // Set bit A25 OFF
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pioptr->PIO_PER = 0x02000000L ; // Enable bit A25 (Stock buzzer)
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pioptr->PIO_OER = 0x02000000L ; // Set bit A25 as output
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#else
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pioptr->PIO_CODR = 0x00010000L ; // Set bit A16 OFF
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pioptr->PIO_PER = 0x00010000L ; // Enable bit A16 (Stock buzzer)
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pioptr->PIO_OER = 0x00010000L ; // Set bit A16 as output
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#endif
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}
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#ifdef REVB
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void buzzer_on()
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{
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PIOA->PIO_SODR = 0x02000000L ; // Set bit A25 ON
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}
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void buzzer_off()
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{
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PIOA->PIO_CODR = 0x02000000L ; // Set bit A25 ON
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}
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#else
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void buzzer_on()
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{
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PIOA->PIO_SODR = 0x00010000L ; // Set bit A16 ON
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}
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void buzzer_off()
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{
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PIOA->PIO_CODR = 0x00010000L ; // Set bit A16 ON
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}
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#endif
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void buzzer_sound( uint8_t time )
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{
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buzzer_on() ;
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Buzzer_count = time ;
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}
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void setFrequency( uint32_t frequency )
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{
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register Tc *ptc ;
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register uint32_t timer ;
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timer = Master_frequency / (8 * frequency) ; // MCK/8 and 100 000 Hz
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if (timer > 65535)
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timer = 65535 ;
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if (timer < 2)
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timer = 2 ;
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ptc = TC0 ; // Tc block 0 (TC0-2)
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ptc->TC_CHANNEL[1].TC_CCR = TC_CCR0_CLKDIS ; // Stop clock
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ptc->TC_CHANNEL[1].TC_RC = timer ; // 100 000 Hz
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ptc->TC_CHANNEL[1].TC_RA = timer >> 1 ;
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ptc->TC_CHANNEL[1].TC_CCR = 5 ; // Enable clock and trigger it (may only need trigger)
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}
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// Start TIMER1 at 100000Hz, used for DACC trigger
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void start_timer1()
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{
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register Tc *ptc ;
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register uint32_t timer ;
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// Enable peripheral clock TC0 = bit 23 thru TC5 = bit 28
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PMC->PMC_PCER0 |= 0x01000000L ; // Enable peripheral clock to TC1
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timer = Master_frequency / 800000 ; // MCK/8 and 100 000 Hz
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ptc = TC0 ; // Tc block 0 (TC0-2)
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ptc->TC_BCR = 0 ; // No sync
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ptc->TC_BMR = 0 ;
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ptc->TC_CHANNEL[1].TC_CMR = 0x00008000 ; // Waveform mode
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ptc->TC_CHANNEL[1].TC_RC = timer ; // 100 000 Hz
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ptc->TC_CHANNEL[1].TC_RA = timer >> 1 ;
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ptc->TC_CHANNEL[1].TC_CMR = 0x0009C001 ; // 0000 0000 0000 1001 1100 0000 0000 0001
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// MCK/8, set @ RA, Clear @ RC waveform
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ptc->TC_CHANNEL[1].TC_CCR = 5 ; // Enable clock and trigger it (may only need trigger)
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// Sound_g.Frequency = 1000 ;
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}
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// Configure DAC1 (or DAC0 for REVB)
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// Not sure why PB14 has not be allocated to the DAC, although it is an EXTRA function
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// So maybe it is automatically done
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void initDac()
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{
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register Dacc *dacptr ;
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PMC->PMC_PCER0 |= 0x40000000L ; // Enable peripheral clock to DAC
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dacptr = DACC ;
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#ifdef REVB
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dacptr->DACC_MR = 0x0B000215L ; // 0000 1011 0000 0001 0000 0010 0001 0101
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#else
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dacptr->DACC_MR = 0x0B010215L ; // 0000 1011 0000 0001 0000 0010 0001 0101
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#endif
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#ifdef REVB
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dacptr->DACC_CHER = 1 ; // Enable channel 0
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#else
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dacptr->DACC_CHER = 2 ; // Enable channel 1
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#endif
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dacptr->DACC_CDR = 2048 ; // Half amplitude
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// Data for PDC must NOT be in flash, PDC needs a RAM source.
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dacptr->DACC_TPR = CONVERT_PTR(Sine_values);
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dacptr->DACC_TNPR = CONVERT_PTR(Sine_values);
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dacptr->DACC_TCR = 50 ; // words, 100 16 bit values
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dacptr->DACC_TNCR = 50 ; // words, 100 16 bit values
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dacptr->DACC_PTCR = DACC_PTCR_TXTEN ;
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NVIC_EnableIRQ(DACC_IRQn) ;
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}
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extern "C" void DAC_IRQHandler()
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{
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// Data for PDC must NOT be in flash, PDC needs a RAM source.
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if (audioQueue.state == AUDIO_PLAYING_WAV) {
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if (nextAudioData) {
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DACC->DACC_TNPR = CONVERT_PTR(nextAudioData);
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DACC->DACC_TNCR = nextAudioSize;
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nextAudioData = NULL;
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CoEnterISR(); // Enter the interrupt
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CoSetFlag(audioFlag);
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CoExitISR(); // Exit the interrupt
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}
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else {
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toneStop();
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}
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}
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else {
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DACC->DACC_TNPR = CONVERT_PTR(Sine_values);
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DACC->DACC_TNCR = 50 ; // words, 100 16 bit values
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}
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}
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void end_sound()
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{
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DACC->DACC_IDR = DACC_IDR_ENDTX ;
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NVIC_DisableIRQ(DACC_IRQn) ;
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TWI0->TWI_IDR = TWI_IDR_TXCOMP ;
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NVIC_DisableIRQ(TWI0_IRQn) ;
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PMC->PMC_PCER0 &= ~0x00080000L ; // Disable peripheral clock to TWI0
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PMC->PMC_PCER0 &= ~0x40000000L ; // Disable peripheral clock to DAC
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}
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// Set up for volume control (TWI0)
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// Need PA3 and PA4 set to peripheral A
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void init_twi()
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{
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register Pio *pioptr ;
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register uint32_t timing ;
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PMC->PMC_PCER0 |= 0x00080000L ; // Enable peripheral clock to TWI0
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/* Configure PIO */
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pioptr = PIOA ;
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pioptr->PIO_ABCDSR[0] &= ~0x00000018 ; // Peripheral A
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pioptr->PIO_ABCDSR[1] &= ~0x00000018 ; // Peripheral A
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pioptr->PIO_PDR = 0x00000018 ; // Assign to peripheral
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timing = Master_frequency * 5 / 1000000 ; // 5uS high and low
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timing += 15 - 4 ;
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timing /= 16 ;
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timing |= timing << 8 ;
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TWI0->TWI_CWGR = 0x00040000 | timing ; // TWI clock set
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TWI0->TWI_CR = TWI_CR_MSEN | TWI_CR_SVDIS ; // Master mode enable
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TWI0->TWI_MMR = 0x002F0000 ; // Device 5E (>>1) and master is writing
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NVIC_EnableIRQ(TWI0_IRQn) ;
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setVolume(2) ;
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}
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static int16_t volumeRequiredIrq ;
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static const uint8_t Volume_scale[NUM_VOL_LEVELS] =
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{
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0, 2, 4, 6, 8, 10, 13, 17, 22, 27, 33, 40,
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64, 82, 96, 105, 112, 117, 120, 122, 124, 125, 126, 127
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} ;
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void setVolume( register uint8_t volume )
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{
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// PMC->PMC_PCER0 |= 0x00080000L ; // Enable peripheral clock to TWI0
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if (volume >= NUM_VOL_LEVELS) {
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volume = NUM_VOL_LEVELS - 1 ;
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}
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volume = Volume_scale[volume] ;
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__disable_irq() ;
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if ( TWI0->TWI_IMR & TWI_IMR_TXCOMP ) {
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volumeRequiredIrq = volume ;
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}
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else {
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TWI0->TWI_THR = volume ; // Send data
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TWI0->TWI_CR = TWI_CR_STOP ; // Stop Tx
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TWI0->TWI_IER = TWI_IER_TXCOMP ;
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}
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__enable_irq() ;
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}
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extern "C" void TWI0_IRQHandler()
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{
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if ( volumeRequiredIrq >= 0 ) {
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TWI0->TWI_THR = volumeRequiredIrq ; // Send data
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volumeRequiredIrq = -1 ;
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TWI0->TWI_CR = TWI_CR_STOP ; // Stop Tx
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}
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else {
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TWI0->TWI_IDR = TWI_IDR_TXCOMP ;
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}
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}
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