[GRUVIN9X] Changes for SOMO sound module

Correction to start pulse timing, and extended data setup time.
Also started using the SOMO reset signal, this allows for faster power on and WDT reset initialization and stops erroneous playback after WDT reset.
Connection needs to be made from PORTH pin 3 via a 220ohm series resistor to the SOMO14D reset pin.

src/board_gruvin9x.cpp

@@ -46,10 +46,10 @@ inline void board_init()
   DDRG = 0b00010000;  PORTG = 0xff; // 7-6:N/A, 5:GearSW, 4: Sim_Ctrl[out], 3:IDL1_Sw, 2:TCut_Sw, 1:RF_Power[in], 0: RudDr_Sw
 
 #if defined(DEBUG) && !defined(VOICE)
-  DDRH = 0b11110000;  PORTH = 0b11011111; // PORTH:7-6 enabled for timing analysis output ... see below ...
+  DDRH = 0b11111000;  PORTH = 0b11010111; // PORTH:7-6 enabled for timing analysis output ... see below ...
 #else
-  DDRH = 0b10110000;  PORTH = 0b11011111; // [7:0 DSM/PPM TX-caddy control. 1=PPM, 0=DSM ]
-                                          // [6:SOMO14D-BUSY 5:SOMO14D-DATA 4:SOMO14D-CLK]
+  DDRH = 0b10111000;  PORTH = 0b11010111; // [7:0 DSM/PPM TX-caddy control. 1=PPM, 0=DSM ]
+                                          // [6:SOMO14D-BUSY 5:SOMO14D-DATA 4:SOMO14D-CLK 3:SOMO14D-RESET]
                                           // [2:VIB_OPTION -- setting to input for now]
                                           // [1:TxD 0:RxD Spare serial port]
 #endif
@@ -106,8 +106,9 @@ inline void board_init()
   /*
    * SOMO set-up (V4 board only)
    */
-  OCR4A = 0x7d;
+  OCR4A = 0x1F4; //2ms
   TCCR4B = (1 << WGM42) | (3<<CS40); // CTC OCR1A, 16MHz / 64 (4us ticks)
+  TIMSK4 |= (1<<OCIE4A); // Start the interrupt so the unit reset can occur
 
 #if defined(EXTRA_ROTARY_ENCODERS)
   //configure uart1 here

src/gruvin9x/somo14d.cpp

@@ -43,7 +43,7 @@
 #include "../open9x.h"
 
 // Start and stop bits need to be 2ms in duration. Start bit is low, stop bit is high
-#define SOMOSSBIT    4 //The 2ms of a stop/start bit
+#define SOMOSSBIT    5 //The 2ms of a stop/start bit
 #define SOMOSTOP    48 //This is the needed 2ms (4) + 20ms (40) to allow for the 
                        //point at which the busy flag is checkable + 2ms for saftey (4)
 #define SOMOSTART   60 //This is the needed 2ms (4) + 2ms (4) for safety + 26ms (52) for the 
@@ -133,8 +133,8 @@ NOINLINE uint8_t SomoWakeup()
       }
       somo14_current = (somo14_current<<1);
       i++;
-      // Strictly speaking there should be a data setup delay in here of 1us
-      // Be we don't like no stinking delays !
+      // Data setup delay
+	  _delay_us(1);
       PORTH |= (1<<OUT_H_14DCLK); // CLK high
     }
 
@@ -148,19 +148,24 @@ NOINLINE uint8_t SomoWakeup()
 }
 
 #ifndef SIMU
-ISR(TIMER4_COMPA_vect) //Every 0.5ms
+ISR(TIMER4_COMPA_vect) //Every 0.5ms normally, every 2ms during startup reset
 {
-  OCR4A = 0x7d; // another 0.5ms
-
-  TIMSK4 &= ~(1<<OCIE4A); // stop reentrance
-
-  sei();
-
-  uint8_t finished = SomoWakeup();
-
-  cli();
-
-  if (!finished) TIMSK4 |= (1<<OCIE4A);
+  static uint8_t reset_dly=4;
+  static uint8_t reset_pause=150;
+  
+  if (reset_dly) 
+	{OCR4A=0x1f4; reset_dly--; PORTH &= ~(1<<OUT_H_14DRESET);} // CLK low
+  else if (reset_pause)
+	{OCR4A=0x1f4; reset_pause--; PORTH |= (1<<OUT_H_14DRESET);} // RESET high
+  else 
+	{
+	OCR4A = 0x7d; // another 0.5ms
+	TIMSK4 &= ~(1<<OCIE4A); // stop reentrance
+	sei();
+	uint8_t finished = SomoWakeup();
+	cli();
+	if (!finished) TIMSK4 |= (1<<OCIE4A);
+	}
 }
 #endif
 

src/open9x.h

@@ -348,9 +348,10 @@ extern uint8_t s_bind_allowed;
 #  define INP_B_ID2      4
 
 #if defined(VOICE)
+#  define OUT_H_14DRESET 3
 #  define OUT_H_14DCLK   4
 #  define OUT_H_14DDATA  5
-#  define OUT_H_14DBUSY  6
+#  define INP_H_14DBUSY  6
 #endif
 
 #define KEYS_PRESSED() (~PINL) // used only for DBLKEYS code.