Peter Feerick and GitHub
6e51c70aa7
Reduce code repetition for sd browser firmware update handling, add some .frsk entries ( #543 )
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* Hacky port of FRSKY_FIRMWARE_EXT update menu
More work is needed to integrate/test the remaining menu items
May just ba a matter of correct parameters for deviceFirmwareUpdate
* Functionalise, of sorts
* Formatting
* Functionalise more repeated update code
2021-11-22 17:01:22 +11:00
jfrickmann and Peter Feerick
019a1584d0
Monospaced font for digits
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So timers etc. do not jump back and forth. Assumes that 4 is the widest digit.
2021-11-22 14:49:44 +10:00
dlktdr and Peter Feerick
7005946808
Fix compiler error when Debug_Timers is enabled
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Lug BG/FG is never used. Only LUA. Removed extra
+ Change my oopsie (model_select.cpp) compiler warning that didn't show up until I started using docker
2021-11-22 13:52:36 +10:00
gagarinlg and Peter Feerick
22112de372
fix touch slide deltaX/deltaY not resetting
2021-11-22 11:44:12 +10:00
ErNis and Raphael Coeffic
3e9a6b79d3
Taranis-based B/W: Initial Contrast fix
2021-11-21 22:43:28 +01:00
Raphael Coeffic and Raphael Coeffic
3ffa531fdd
Fix length of Txx string
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Resolves #1116
2021-11-21 22:34:53 +01:00
eshifri and Raphael Coeffic
0388734828
Fix converion functionality as well
2021-11-21 22:30:22 +01:00
eshifri and Raphael Coeffic
aabcc4fb6f
Save third value for EDGE LS in YAML
2021-11-21 22:30:22 +01:00
Raphael Coeffic and Raphael Coeffic
916651033c
Fixed mixer scheduler timer overflow
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The max period is now 50ms, so that it overflows the 16bit timer when set to the max period.
Many thanks to @marianomd for finding the issue and the proposed fix!
2021-11-21 21:53:11 +01:00
Raphael Coeffic
ead357c702
Do not output the YAML files in simu without DEBUG_YAML
2021-11-21 15:55:55 +01:00
kkoenig1@optonline.com and Risto
2c4ec3f3c5
fixed compiler warning as per Ritso
2021-11-21 12:53:31 +01:00
Peter Feerick
a1d279a552
Bump libopenui to for #1077 fix
2021-11-21 20:56:40 +10:00
Raphael Coeffic
cee9b67cc6
Hotfix YAML generator
2021-11-21 11:46:37 +01:00
Raphael Coeffic and Raphael Coeffic
3c43ac6c87
Do not enable INTERNAL_MODULE_CRSF by default
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
5e3c20b258
Push some dirty hack to give internal CRSF a higher prio
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This allows for BF scripts to run on internal CRSF.
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
9c50255905
Fix pollExtPXX2()
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
5bbc055f3e
Remove debug pins
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
a2b7f88e41
Added command to start/stop the pulses
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
81da0bf587
Added power and bootpin commands (Thx @pkendall64)
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
85ec133ff3
Auto baudrate on serialpassthrough
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baudrate param becomes optional
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
c5c2829c24
Added baud rate changing on the fly to serial pass through
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
f3301e6210
Added control line and bitrate callbacks
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And some additional clean-up
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
01059da849
Fixed serial passthrough exit when pulling USB cable
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
aa7b0143bd
Add active polling on UART buffer and bigger USB buffers
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
1fe4876786
Revert ModuleFifo size to original (PXX2_FRAME_MAXLENGTH = 64)
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
729ed91e7b
Add @CapnBry 5.25M
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
96743a9fc4
PoC: connect USB/serial ISR directly to the respective serial send
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This assumes that USB IRQ has a lower logical prio as the UART IRQ so that it can be pre-empted by the USART ISR.
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
3e390bd582
Cleanup debug pin toggle
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
3fd3077944
Fixed simulator
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
35f8dc2551
Fixed compilation for pulses based internal module
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
d2acdda429
Fixed AUX_SERIAL
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
07c6d3b116
Set CDC_IN_FRAME_INTERVAL to 4 (USB CDC driver)
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
73790c1654
Use FreeRTOS stream buffers and task notifications
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
59f2b5e8b0
Temporary boosting the ModuleFifo to 128 bytes
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This is to better cope with the CRSF frames that need to contain 64, whereby Fifo has a maximum content length of (N-1).
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
4124d0a950
Quick and dirty: use a memory address actually usable with DMA
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
c95667394c
OMG when is it ending
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
0cef967912
Fix typo
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
496c3861c4
Fix targets with internal module UART without DMA
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
ffd537a28b
Fixed compiling with DEBUG=ON
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
c8a4a80ffd
Serial pass-through
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
1f0480532d
Removed "[SYNC]" debug
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
8b438bc672
Fix receiving RADIO_ID pkt
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Thx @CapnBry
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
6b94c2f45d
Small fixes for TX16S
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
b1b3423844
Use stream buffer for CLI
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
ae629c4065
Enable CLI on TX16S
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
7cfcac3e1e
Fix compiling with CLI and define most commands away
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
043c1e6a2d
Fixed pushing CRSF telem packets to internal module
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
9fb741be98
Don't forget to actually send the payload
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
dbb976063a
CROSSFIRE does look like it's defined at this point....
2021-11-21 11:18:35 +01:00
Raphael Coeffic and Raphael Coeffic
22d82784b5
Add CMake defs for internal CRSF on TX16S
2021-11-21 11:18:35 +01:00